Research Profile
We believe that interdisciplinary and cross-layer research, ranging from information-theoretic principles to VLSI implementation, is the most promising way to make future communications systems even faster, more reliable, and more energy efficient. For this reason, our work lies on the intersection between communications, hardware design, and machine learning. The specific research activities of our lab include algorithm and architecture co-design of VLSI circuits for communications, error-correction coding theory and practice, non-linear signal processing, massive MIMO, as well applications of approximate computing and machine learning to signal processing for communications.
Meet some of our Researchers
Recent Publications
Our most recent peer reviewed publications
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A Generalized Adjusted Min-Sum Decoder for 5G LDPC Codes
IEEE Transactions on Circuits and Systems I: Regular Papers (2024) -
High-Throughput and Flexible Belief Propagation List Decoder for Polar Codes
IEEE Transactions on Signal Processing (2024) -
Pipelined Architecture for Soft-Decision Iterative Projection Aggregation Decoding for RM Codes
IEEE Transactions on Circuits and Systems I: Regular Papers (2023) -
LoRa Preamble Detection Robust to Inter-channel Interference
(2023) -
Band-of-Interest-Based Channel Impulse Response Fusion for Breathing Rate Estimation with UWB
(2023)
Contact
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Visiting address
Groene Loper 19Flux, room 4.1305612 AP EindhovenNetherlands -
Postal address
P.O. Box 513Department of Electrical Engineering5600 MB EindhovenNetherlands -
Postal address
P.O. Box 513Department of Electrical Engineering5600 MB EindhovenNetherlands -
Teamleada.k.balatsoukas.stimming@ tue.nl